Five Feed Learning Solutions Pvt. Ltd Hiring Freshers Software Developer - VLSI / M.tech @ Bangalore Location
Job description
Fresher, 1 - 3 years Bangalore
Perks & Benefits
Salary
Rs 2.5 Lacs - 4 Lacs p.a
Key Skills
Custom Coding
Technical Support
VLSI
Modelsim
Verilog
FPGAs
Perl
Synplify
Vivado/ISE
Xilinx ISE
Category
Technical Developer
Industry
Education / Training
Number of Positions
2
Other benefits
Retirement Benefits, Fringe Benefits, sick leave, Conveyance allowance, Flexi work hours, Leave with-pay
Qualifications
Graduation
B.E, B.Tech
Post Graduation
M.E., M.Tech VLSI
Job Description
Roles and Responsibilities
• Good communication and analytical problem solving capability.
• Hands-on experience on FPGA / RTL Design involving verilog HDL,Tanner, Vivado ISE/Xilinx ISE, Modelsim and synplify Synopsys.
• Strong knowledge on VLSI Circuit designs , parameter synthesis etc
• Knowledge on TCAD, HSPICE, PSPICE will be an added advantage.
• This role includes RTL design, verification, FPGA partitioning and implementation, and lab-based bring up of the SoC on FPGAs.
• Recent FPGA experience including implementation, synthesis (Synplify), timing closure (Vivado/ISE).
• Ability to architect, implement and verify modules for FPGA interconnect.
• Proficient in Verilog, Perl, and Make
• Both simulation-based verification and lab-based debug skills on FPGAs.
Recruiter Profile
Recruiter Name:
Email Address: hiringteam.3@fflspl.com
Phone No. : 8076971094
Contact Company: Five Feed Learning Solutions Pvt. Ltd.
Perks & Benefits
Salary
Rs 2.5 Lacs - 4 Lacs p.a
Key Skills
Custom Coding
Technical Support
VLSI
Modelsim
Verilog
FPGAs
Perl
Synplify
Vivado/ISE
Xilinx ISE
Category
Technical Developer
Industry
Education / Training
Number of Positions
2
Other benefits
Retirement Benefits, Fringe Benefits, sick leave, Conveyance allowance, Flexi work hours, Leave with-pay
Qualifications
Graduation
B.E, B.Tech
Post Graduation
M.E., M.Tech VLSI
Job Description
Roles and Responsibilities
• Good communication and analytical problem solving capability.
• Hands-on experience on FPGA / RTL Design involving verilog HDL,Tanner, Vivado ISE/Xilinx ISE, Modelsim and synplify Synopsys.
• Strong knowledge on VLSI Circuit designs , parameter synthesis etc
• Knowledge on TCAD, HSPICE, PSPICE will be an added advantage.
• This role includes RTL design, verification, FPGA partitioning and implementation, and lab-based bring up of the SoC on FPGAs.
• Recent FPGA experience including implementation, synthesis (Synplify), timing closure (Vivado/ISE).
• Ability to architect, implement and verify modules for FPGA interconnect.
• Proficient in Verilog, Perl, and Make
• Both simulation-based verification and lab-based debug skills on FPGAs.
Recruiter Profile
Recruiter Name:
Email Address: hiringteam.3@fflspl.com
Phone No. : 8076971094
Contact Company: Five Feed Learning Solutions Pvt. Ltd.
